Bit manipulation instructions

This article is about the general topic of Instruction set bit manipulation subsets. For bit manipulation extensions unique to AMD and Intel, see x86 Bit manipulation instruction set.
Further information on bit manipulation in general, see: bit manipulation

Bit manipulation instructions are instructions that perform bit manipulation operations in hardware, rather than requiring several instructions for those operations as illustrated with examples in software. Several leading as well as historic architectures have bit manipulation instructions including ARM, WDC 65C02, the TX-2 and the Power ISA.

Bit manipulation is usually divided into subsets as individual instructions can be costly to implement in hardware when the target application has no justification. Conversely, if there is a justification then performance may suffer if the instruction is excluded. Carrying out the cost-benefit analysis is a complex task: one of the most comprehensive efforts in bit manipulation was a collaboration headed by Clare Wolfe, providing justifications, use-cases, c code, proofs and Verilog for each proposed RISC-V instruction.

Particular practical examples include bit banging of GPIO using a low-cost embedded controller such as the WDC 65C02, 8051 and Atmel PIC. At the slow clock rate of these CPUs, if bit-set/clear/test bit manipulation were not available these low-cost CPUs would not be fast enough to be for the target application.


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